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sys-boot/u-boot: version bump

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This commit is contained in:
Martin Sekera 2021-07-31 14:41:22 +02:00
parent 6f5e1e8b5b
commit 559b1a65f8
2 changed files with 67 additions and 45 deletions
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110
sys-boot/u-boot/files/rk3399-nanopi-m4v2.add.patch
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@ -1,37 +1,36 @@
From bac61aa79f6d8c3853b2b2840eaa964b775669e6 Mon Sep 17 00:00:00 2001
From e0d756f01e5c657ad975be7ae70274c07dbf5d46 Mon Sep 17 00:00:00 2001
From: Martin Sekera <sekerama@gmail.com>
Date: Mon, 26 Apr 2021 16:51:56 +0200
Subject: [PATCH] Add support for NanoPi M4 V2
Date: Sat, 31 Jul 2021 14:37:01 +0200
Subject: [PATCH] board: dts: rockchip: Add NanoPi M4V2
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3399-nanopi-m4v2-u-boot.dtsi | 17 ++++++
arch/arm/dts/rk3399-nanopi-m4v2.dts | 66 +++++++++++++++++++++
configs/nanopi-m4v2-rk3399_defconfig | 63 ++++++++++++++++++++
include/configs/rk3399_common.h | 4 ++
5 files changed, 151 insertions(+)
arch/arm/dts/rk3399-nanopi-m4v2-u-boot.dtsi | 31 +++++++++
arch/arm/dts/rk3399-nanopi-m4v2.dts | 77 +++++++++++++++++++++
configs/nanopi-m4v2-rk3399_defconfig | 76 ++++++++++++++++++++
4 files changed, 185 insertions(+)
create mode 100644 arch/arm/dts/rk3399-nanopi-m4v2-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3399-nanopi-m4v2.dts
create mode 100644 configs/nanopi-m4v2-rk3399_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index c6710826a0..94f224fa5c 100644
index 537c96bf5b..49c327bb86 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -131,6 +131,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
@@ -132,6 +132,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3399-nanopc-t4.dtb \
rk3399-nanopi-m4.dtb \
rk3399-nanopi-m4-2gb.dtb \
+ rk3399-nanopi-m4v2.dtb \
rk3399-nanopi-m4b.dtb \
rk3399-nanopi-neo4.dtb \
rk3399-orangepi.dtb \
rk3399-pinebook-pro.dtb \
rk3399-nanopi-r4s.dtb \
diff --git a/arch/arm/dts/rk3399-nanopi-m4v2-u-boot.dtsi b/arch/arm/dts/rk3399-nanopi-m4v2-u-boot.dtsi
new file mode 100644
index 0000000000..4b775f6d2c
index 0000000000..2e3dba00c7
--- /dev/null
+++ b/arch/arm/dts/rk3399-nanopi-m4v2-u-boot.dtsi
@@ -0,0 +1,17 @@
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
@ -49,12 +48,26 @@ index 0000000000..4b775f6d2c
+&sdio0 {
+ status = "disabled";
+};
+
+&vdd_center {
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <950000>;
+};
+
+&vdd_log {
+ regulator-init-microvolt = <950000>;
+};
+
+&pwm2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm2_pin>;
+};
diff --git a/arch/arm/dts/rk3399-nanopi-m4v2.dts b/arch/arm/dts/rk3399-nanopi-m4v2.dts
new file mode 100644
index 0000000000..eac77f2abb
index 0000000000..81d245e48d
--- /dev/null
+++ b/arch/arm/dts/rk3399-nanopi-m4v2.dts
@@ -0,0 +1,66 @@
@@ -0,0 +1,77 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * FriendlyElec NanoPi M4 board device tree source
@ -103,6 +116,17 @@ index 0000000000..eac77f2abb
+ regulator-boot-on;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vdd_log: vdd-log {
+ compatible = "pwm-regulator";
+ pwms = <&pwm2 0 25000 1>;
+ regulator-name = "vdd_log";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-init-microvolt = <900000>;
+ };
+};
+
+&vcc3v3_sys {
@ -123,21 +147,24 @@ index 0000000000..eac77f2abb
+};
diff --git a/configs/nanopi-m4v2-rk3399_defconfig b/configs/nanopi-m4v2-rk3399_defconfig
new file mode 100644
index 0000000000..44798e6b43
index 0000000000..71827d1b15
--- /dev/null
+++ b/configs/nanopi-m4v2-rk3399_defconfig
@@ -0,0 +1,63 @@
@@ -0,0 +1,76 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_EVB_RK3399=y
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4v2"
+CONFIG_DEBUG_UART=y
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4v2.dtb"
+CONFIG_MISC_INIT_R=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_STACK_R=y
@ -146,16 +173,19 @@ index 0000000000..44798e6b43
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4v2"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
@ -163,11 +193,16 @@ index 0000000000..44798e6b43
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_NVME=y
+CONFIG_PCI=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_TYPEC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM_RK3399_LPDDR4=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
@ -176,35 +211,22 @@ index 0000000000..44798e6b43
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+CONFIG_LOG=y
+CONFIG_LOG_CONSOLE=y
+CONFIG_SPL_LOG=y
+CONFIG_SPL_LOG_CONSOLE=y
+CONFIG_LOG_MAX_LEVEL=7
+# CONFIG_USE_TINY_PRINTF is not set
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index d0fc598319..7785146527 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -19,6 +19,10 @@
#define CONFIG_SYS_INIT_SP_ADDR 0x00300000
#define CONFIG_SYS_LOAD_ADDR 0x00800800
+#define CONFIG_MISC 1
+#define CONFIG_MISC_INIT_R 1
+#define CONFIG_ROCKCHIP_EFUSE 1
+
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT)
#define CONFIG_SPL_STACK 0x00400000
#define CONFIG_SPL_MAX_SIZE 0x40000
--
2.31.1
2.32.0