add sys-boot/u-boot

This commit is contained in:
Martin Sekera 2021-04-26 01:41:28 +02:00
parent b785a09bb0
commit 1125f78e4b
3 changed files with 152 additions and 0 deletions

View file

@ -0,0 +1,38 @@
From e622965b31e1d08c2b7c6b3a8d683c59f37b2733 Mon Sep 17 00:00:00 2001
From: Nadia Holmquist Pedersen <nadia@nhp.sh>
Date: Sat, 20 Jun 2020 01:47:52 +0200
Subject: [PATCH 2/3] Correct boot order to be USB -> SD -> eMMC
---
include/configs/rockchip-common.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 0b9e24d1db..9e217fad2a 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -17,8 +17,8 @@
/* First try to boot from SD (index 0), then eMMC (index 1) */
#if CONFIG_IS_ENABLED(CMD_MMC)
#define BOOT_TARGET_MMC(func) \
- func(MMC, mmc, 0) \
- func(MMC, mmc, 1)
+ func(MMC, mmc, 1) \
+ func(MMC, mmc, 0)
#else
#define BOOT_TARGET_MMC(func)
#endif
@@ -55,9 +55,9 @@
#ifdef CONFIG_ROCKCHIP_RK3399
#define BOOT_TARGET_DEVICES(func) \
+ BOOT_TARGET_USB(func) \
BOOT_TARGET_MMC(func) \
BOOT_TARGET_NVME(func) \
- BOOT_TARGET_USB(func) \
BOOT_TARGET_PXE(func) \
BOOT_TARGET_DHCP(func) \
BOOT_TARGET_SF(func)
--
2.27.0

View file

@ -0,0 +1,50 @@
From 08e8ace48b5c3a31b44661ef22a8b8a459906d7e Mon Sep 17 00:00:00 2001
From: Nadia Holmquist Pedersen <nadia@nhp.sh>
Date: Sat, 20 Jun 2020 01:49:49 +0200
Subject: [PATCH 3/3] Enable the power LED during early startup
---
arch/arm/mach-rockchip/rk3399/rk3399.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 4fda93b152..e24b39486d 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -19,6 +19,8 @@
#include <asm/arch-rockchip/hardware.h>
#include <linux/bitops.h>
#include <power/regulator.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -119,8 +121,8 @@ void board_debug_uart_init(void)
struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
#ifdef CONFIG_TARGET_CHROMEBOOK_BOB
struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE;
- struct rockchip_gpio_regs * const gpio = (void *)GPIO0_BASE;
#endif
+ struct rockchip_gpio_regs * const gpio = (void *)GPIO0_BASE;
#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
/* Enable early UART0 on the RK3399 */
@@ -153,6 +155,14 @@ void board_debug_uart_init(void)
spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 4), GPIO_PULL_NORMAL);
#endif /* CONFIG_TARGET_CHROMEBOOK_BOB */
+ {
+ // set GPIO0_A2/B3 to GPIO_ACTIVE_HIGH
+ // set GPIO0_A2/B3 to OUTPUT
+ int mask = (1UL << RK_PA2) | (1UL << RK_PB3);
+ setbits_le32(&gpio->swport_dr, mask);
+ setbits_le32(&gpio->swport_ddr, mask);
+ }
+
/* Enable early UART2 channel C on the RK3399 */
rk_clrsetreg(&grf->gpio4c_iomux,
GRF_GPIO4C3_SEL_MASK,
--
2.27.0